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Renice 6U VPX computing blade complies with OpenVPX 6U standard specifications; signal definition complies with the definition request of Open VPX VITA65. It support the information monitoring and managing function on hardware status such as fault report, self-inspection when power on and operation and software interface for output current,voltage, controller temperature, OS or FW version. Besides, It use multi-core high performance processor based on X86 architecture and its theoretical floating- point peak computing capacity is≥690GFLOPS, which can be used in the radar signal process, data process and HPC etc high speed computing application.

The interconnection interface of 6U VPX system is interlinked through VPX backplane.

▲Use for data plane interconnection 40Gbe Ethernet and RapidIO interface;

▲Gigabit Serdes Interface for controlling Planar Interconnection;
▲Single port GPIO for system interruption and time synchronization;
▲PCIE Interface for extended Planar Interconnect;
▲JTAG Interface for system debug and maintenance;
▲PMB Interface for chassis Management;
▲Use for identifying blade code signal in the different chassis slot;
▲Use for identifying different chassis, cabinets and code identification signal.


1.High performance computing ability: multi-core high performance processor based on X86 architecture and theoretical floating-point peak computing ability is ≥ 690 GFLOPS;

2.32GB memory on board;
3.High speed serial real-time bus: 40GbE Ethernet, RapidIO X4 and PCIE 3.0 X8 bus;
4.Front interfaces: indicator lights, reset button, HJ30J connectors and gigabit debugging ports;
5.HJ30J connector includes of JTAG, serial port, VGA,USB interface and so on, which are necessary for debugging;
6.Heat dissipation:air cooling and liquid cooling; 7.Industrial operation Temp.:-40℃~+55℃.

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