LSB (Least Significant Bit) and MSB (Most Significant Bit) are actually two bits in the same cell of a MLC NAND Flash, LSB is relative to Lower Page and MSB is associated to Upper Page. As the Lower Page is programmed first, the Upper Page has higher requirements for the voltage accuracy during programming. Programming the Upper Page is slow and inevitably causes influences or even errors to Lower Page. And in theory programming the Lower Page certainly has effects on the Upper Page.
Two important questions have to be answered first for testing LSB and MSB:
1. How to figure out which is LSB and which is MSB？
2. How to test the influences on MSB by LSB program? And the vice versa.
For the first question, some NAND Flash manufacturers give out which are the shared pages with a list in the datasheet, while some others don’t provide this. It is quite simple for those with the list, we can just follow the list to do the test.
Shared Pages List provided by Nand Flash manufacturer:
And for those without such list, we can judge by testing the programming time for each page that the pages with shorter programming time are Lower Pages and longer time are Upper Pages.
Suppose the NAND Flash manufacturer doesn’t provide the list of shared pages, there are two approaches to test the programming time for each page: One is test through the GUI of Renice NFA100-E Nand Flash Tester, and another is test through scripts. The script takes the advantage of handling all the other tests to avoid redundant steps.
Based on the above, the test flow chart is designed as follows:
Mutual impacts between LSB and MSB can be obtained rapidly by loading the script to Renice NFA100-E Nand Flash Tester, and of course the same approach can be adopted to test the interaction influences among the adjacent cells in a block, namely Program Disturb and Read Disturb.
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